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TPS7A8101QDRBRQ1 产品设计参考手册 - TI（德州仪器）
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TI（德州仪器）
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稳压芯片
封装:
VDFN-8
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TPS7A8101QDRBRQ1 编带
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TPS7A8101QDRBRQ1数据手册
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Iout
Vout
Iout
Vout
PG
EN
Thermal Guidelines and Layout Recommendations
www.ti.com
Figure 2. Load Step and Transient Response
4.3 Power Good
Figure 3 shows the operation of the Power Good (PG) output. Vin (6 V) is present and the chip is enabled
(c1, gold) The PG output (C3, blue) goes HIGH approximately 1.5 ms after Vout (C2, red) goes into
regulation.
Figure 3. Power Good Operation
5 Thermal Guidelines and Layout Recommendations
Thermal management is a key component of design for any power converter and is especially important
when the power dissipation in the LDO regulator is high. Use the following formula to approximate the
maximum power dissipation for the particular ambient temperature:
T
J
= T
A
+ P
D
× θ
JA
4
TPS7A1601EVM-046 SLVU549– December 2011
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