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DSPIC33FJ128GP802-E/MM 其他数据使用手册 - Microchip（微芯）
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Microchip（微芯）
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微控制器
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QFN-28
描述:
DSPIC33FJ128GP802-E/MM 管装
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DSPIC33FJ128GP802-E/MM数据手册
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© 2009 Microchip Technology Inc. DS01249A-page 3
AN1249
Standard Data Frames
The standard data frame messages start with a
Start-of-Frame (SOF) bit followed by the message.
The user application provides the following fields to
the ECAN module:
• Arbitration field
• Control field
• Data field
The Cyclic Redundancy Check (CRC), Acknowledge
(ACK) and End-of-Frame (EOF) fields are
automatically appended by the ECAN module to the
user-provided fields and are sent over the CAN bus as
a single message.
FIGURE 2: STANDARD DATA FRAME
TABLE 1: ECAN™ STANDARD FRAME MESSAGE FIELDS
Field Length Application Usage
Start-of-Frame (SOF) 1 bit Indicates the start of frame transmission.
Identifier A 11 bits A (unique) identifier for the data.
Remote Transmission Request (RTR) 1 bit Can be dominant in Data frame (logical ‘0’) or recessive
(logical ‘1’).
Identifier Extension bit (IDE) 1 bit Must be dominant (logical ‘0’).
Reserved bit (RB0) 1 bit Must be set to dominant (logical ‘0’).
Data Length Code (DLC) 4 bits Number of bytes of data (0-8 bytes).
Data field 0-8 bytes Data to be transmitted (length dictated by DLC field).
CRC 15 bits Cyclic redundancy check.
CRC delimiter 1 bit Must be recessive (logical ‘1’).
ACK slot 1 bit Transmitter sends recessive (logical ‘1’) and a receiver will assert
a dominant (logical ‘0’), if message is received with no errors.
ACK delimiter 1 bit Must be recessive (logical ‘1’).
End-of-Frame (EOF) 7 bits Must be recessive (logical ‘1’).
Identifier
11 bits
RTR IDE
DLC Data CRC ACK EOF
4 bits 0-8 bytes
16 bits 2 bits 7 bits
RB0
IFS
3 bits
SID10 SID1 SID0
Interframe Space
Interframe Space
Arbitration
Field
Control
Field
Data
Field
CRC
Field
ACK
Field
End-of-
11-bit Identifier
User-provided fields
Fields added by ECAN™ module
SOF
Frame
IDE = Dominant (logical ‘0’)
RTR = Dominant (logical ‘0’) for a data frame
RB0 = Dominant (logical ‘0’)
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