Datasheet 搜索 > Flash芯片 > Micron（镁光） > JS28F320J3F75E 数据手册 > JS28F320J3F75E 其他数据使用手册 4/208 页
器件3D模型￥ 13.73
JS28F320J3F75E 其他数据使用手册 - Micron（镁光）
制造商:
Micron（镁光）
分类:
Flash芯片
封装:
TSOP-56
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P9Hot
典型应用电路图在P148
原理图在P90P91P92P93P95P111P116P125P129P137P146P167
封装尺寸在P205P206
标记信息在P205P206
封装信息在P14P205P206P207
功能描述在P201
技术参数、封装参数在P46P47P48P49P50P51P52P53P54P55P56P57
应用领域在P37P115P127P197P198
电气规格在P47P62P63P64P105P108P109P112P132P167
导航目录
JS28F320J3F75E数据手册
Page:
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若手册格式错乱，请下载阅览PDF原文件
16-/12-bit ADC
x4
Analog
Mux
ADC
Result
Regs
Peripheral Frame 1
Global Shared
16x 4Kx16
GS0-GS15 RAMs
CPU1 to CPU2
1Kx16 MSG RAM
GPIO MUX, Input X-BAR, Output X-BAR
CPU1.M0 RAM 1Kx16
CPU1.M1 RAM 1Kx16
CPU2.M0 RAM 1Kx16
CPU2.M1 RAM 1Kx16
PSWD
PSWD
Secure Memories
shown in Red
MEMCPU2
CPU2 to CPU1
1Kx16 MSG RAM
MEMCPU1
CPU1 Buses
CPU2 Buses
A5:0
B5:0
C5:2
ADCIN14
ADCIN15
D5:0
Comparator
SubSystem
(CMPSS)
DAC
x3
Config
CPU1.CLA1 Bus
CPU2.CLA1 Bus
C28 CPU-1
FPU
VCU-II
TMU
CPU Timer 0
CPU Timer 1
CPU Timer 2
ePIE
(up to 192
interrupts)
WD Timer
NMI-WDT
C28 CPU-2
FPU
VCU-II
TMU
CPU Timer 0
CPU Timer 1
CPU Timer 2
ePIE
(up to 192
interrupts)
WD Timer
NMI-WDT
CPU1.CLA1 Data ROM
(4Kx16)
CPU1.CLA1 to CPU1
128x16 MSG RAM
CPU1 to CPU1.CLA1
128x16 MSG RAM
CPU1.D0 RAM 2Kx16
CPU1.D1 RAM 2Kx16
Boot-ROM 32Kx16
Non Secure
Secure-ROM 32Kx16
Secure
CPU1 Local Shared
6x 2Kx16
LS0-LS5 RAMs
CPU2 to CPU2.CLA1
128x16 MSG RAM
CPU2.CLA1 to CPU2
128x16 MSG RAM
CPU2.D0 RAM 2Kx16
CPU2.D1 RAM 2Kx16
CPU2.CLA1 Data ROM
(4Kx16)
Boot-ROM 32Kx16
Non Secure
Secure-ROM 32Kx16
Secure
CPU2 Local Shared
LS0-LS5 RAMs
CPU1.CLA1
CPU1.DMA CPU2.DMA
CPU2.CLA1
Data Bus
Bridge
ePWM-1/../12
eCAP-
1/../6
eQEP-1/2/3
SDFM-1/2
EXTSYNCIN
EXTSYNCOUT
TZ1-TZ6
ECAPx
EQEPxA
EQEPxB
EPWMxA
EPWMxB
EQEPxI
EQEPxS
SDx_Dy
SDx_Cy
A
B
C
D
JTAG
AUXCLKIN
External Crystal or
Oscillator
Watchdog 1/2
Main PLL
Aux PLL
INTOSC1
INTOSC2
Low-Power
Mode Control
GPIO Mux
TRST
TCK
TDI
TMS
TDO
6x 2Kx16
Dual
Code
Security
Module
+
Emulation
Code
Security
Logic
(ECSL)
Dual
Code
Security
Module
+
Emulation
Code
Security
Logic
(ECSL)
Interprocessor
Communication
(IPC)
Module
PUMP
OTP/Flash
Wrapper
FLASH
256K x 16
Secure
User
Configurable
DCSM
OTP
1K x 16
OTP/Flash
Wrapper
FLASH
256K x 16
Secure
User
Configurable
DCSM
OTP
1K x 16
SCI-
A/B/C/D
(16L FIFO)
I2C-A/B
(16L FIFO)
Data Bus Bridge
SCITXDx
SCIRXDx
SDAx
SCLx
CAN-
A/B
(32-MBOX)
Data Bus
Bridge
CANRXx
CANTXx
GPIO
Data Bus
Bridge
GPIOn
Data Bus
Bridge
USB
Ctrl /
PHY
USBDP
USBDM
USB
Ctrl /
PHY
EMIF1
Data Bus
Bridge
EM1Dx
EM1Ax
EM1CTLx
EMIF2
Data Bus
Bridge
EM2Dx
EM2Ax
EM2CTLx
Peripheral Frame 2
SPI-
A/B/C
(16L FIFO)
SPISIMOx
SPISOMIx
SPICLKx
SPISTEx
McBSP-
A/B
MDXx
MRXx
MCLKXx
MCLKRx
MFSXx
MFSRx
uPP
RAM
UPPAD[7:0]
UPPAEN
UPPAST
UPPAWT
UPPACLK
HRPWM-1/../8
(CPU1 only)
4
TMS320F28379D
,
TMS320F28377D
TMS320F28376D, TMS320F28375D, TMS320F28374D
ZHCSC63F –DECEMBER 2013–REVISED NOVEMBER 2015
www.ti.com.cn
器件概述
版权 © 2013–2015, Texas Instruments Incorporated
1.4 功功能能框框图图
图 1-1 显示了 CPU 系统及相关外设。
图图 1-1. 功功能能方方框框图图
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