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MPC8308CVMAGDA 其他数据使用手册 - NXP（恩智浦）
制造商:
NXP（恩智浦）
分类:
微处理器
封装:
BGA-473
描述:
NXP MPC8308CVMAGDA 芯片, 微控制器, 32位, POWER, 400MHZ, MAPBGA-473
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
原理图在P3P9
技术参数、封装参数在P5
应用领域在P18
导航目录
MPC8308CVMAGDA数据手册
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of 36 Go
若手册格式错乱，请下载阅览PDF原文件
Freescale Semiconductor
Application Note
© Freescale Semiconductor, Inc., 2009. All rights reserved.
Freescale Semiconductor offers many devices with the
QUICC Engine™ technology, a high-performance,
multiprotocol processing block. A common use of the
QUICC Engine block is to establish an HDLC
communication path over a TDM interface, such as a T1 or
E1 link. This application note describes the various
sub-blocks used in the QUICC Engine communications
engine for this application, discusses how the sub-blocks
interoperate with each other, describes how to initialize them
for the HDLC communication path, and provides a software
demonstration of HDLC mode via a TDM interface using
on-chip loopback.
The examples and demonstration software in this application
note were developed and verified using the MPC8360E
device in a MPC8360E-RDK system. This note applies to
any MPC83xx or MPC85xx device with a QUICC Engine
block, although small differences in device and system
configuration will require minor changes to the software.
To locate any published errata or documentation updates
issued after this note was released, please refer to the
Freescale website listed on the back cover of this document.
Contents
1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2. QUICC Engine Sub-blocks Needed for a Single Channel
of HDLC over TDM . . . . . . . . . . . . . . . . . . . . . . . . . 5
3. QUICC Engine Control . . . . . . . . . . . . . . . . . . . . . . 7
4. QUICC Engine Baud Rate Generates and Clock
Routing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5. Timeslot Assigner Description/Configuration . . . . 10
6. UCC Description/Configuration . . . . . . . . . . . . . . . 14
8. Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
9. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
A. Code Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Communicating via HDLC over a TDM
Interface with a QUICC Engine™ UCC
by: Freescale Semiconductor, Inc
Document Number: AN4026
Rev. 0, 12/2009
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