Datasheet 搜索 > 16位微控制器 > NXP（恩智浦） > MC9S12A64CFUE 数据手册 > MC9S12A64CFUE 用户编程技术手册 3/60 页
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MC9S12A64CFUE 用户编程技术手册 - NXP（恩智浦）
制造商:
NXP（恩智浦）
分类:
16位微控制器
封装:
QFP-80
描述:
NXP MC9S12A64CFUE 微控制器, 16位, S12A, 25 MHz, 64 KB, 4 KB, 80 引脚, QFP
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MC9S12A64CFUE数据手册
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Application Note
Overview of the MC9S12DP256’s FLASH
AN2153
3
Figure 1. MC9S12DP256 Memory Map
Overview of the MC9S12DP256’s FLASH
The MC9S12DP256’s 256 K of on-chip FLASH memory is composed of
four 65,536 byte blocks. Each block is arranged as 32,768 16-bit words
and may be read as bytes, words, or misaligned words. Access time is
one bus cycle for bytes and aligned words reads and two bus cycles for
misaligned word reads. Write operations for program and erase
operations can be performed only as an aligned word. Each 64-K block
is organized in 1024 rows of 32 words. An erase sector contains 8 rows
or 512 bytes. Erase operations may be performed on a sector as small
as 512 bytes or on the entire 65,536-byte block. An erased word reads
$FFFF and a programmed word reads $0000.
$0000
Flash Control Registers
Register Base + $100
$3E
$3F
16K Paged
Memory
$4000
$8000
$C000
$FFFF
$30 $31 $32 $33 $34 $35 $36 $37 $38 $39
$3A $3B $3C $3D $3E $3F
Block 3 Block 2 Block 1 Block 0
Protected Low Area
0.5K, 1K, 2K, 4K
Protected High Area
2K, 4K, 8K, 16K
$FF00 - $FF0F, Access Key, Protection, Security
Frees
ca
le Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
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