Datasheet 搜索 > 16位微控制器 > NXP（恩智浦） > MC9S12A64CFUE 数据手册 > MC9S12A64CFUE 用户编程技术手册 6/60 页
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MC9S12A64CFUE 用户编程技术手册 - NXP（恩智浦）
制造商:
NXP（恩智浦）
分类:
16位微控制器
封装:
QFP-80
描述:
NXP MC9S12A64CFUE 微控制器, 16位, S12A, 25 MHz, 64 KB, 4 KB, 80 引脚, QFP
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MC9S12A64CFUE数据手册
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Application Note
AN2153
6
The FPOPEN bit in each FPROT register determines whether the entire
FLASH block or subsections of it can be programmed or erased. When
the FPOPEN bit is erased (1), the remainder of the bits in the register
determine the state of protection and the size of each protected block. In
its programmed state (0), the entire FLASH block is protected and the
state of the remaining bits within the FPROT register is irrelevant.
Figure 3. FLASH Protection and Security Memory Locations
The FPHDIS and FPLDIS bits determine the protection state of the
upper and lower areas within each 64-K block respectively. The erased
state of these bits allows erasure and programming of the two protected
areas and renders the state of the FPHS[1:0] and FPLS[1:0] bits
immaterial. When either of these bits is programmed, the FPHS[1:0] and
FPLS[1:0] bits determine the size of the upper and lower protected
areas. The tables in Figure 4 summarize the combinations of the
FPHS[1:0] and FPLS[1:0] bits and the size of the protected area
selected by each.
Address Description
$FF00–$FF07 Security back door comparison key
$FF08–$FF09 Reserved
$FF0A Protection byte for FLASH block 3
$FF0B Protection byte for FLASH block 2
$FF0C Protection byte for FLASH block 1
$FF0D Protection byte for FLASH block 0
$FF0E Reserved
$FF0F Security byte
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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