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TLK1102ERGER 数据手册 - TI(德州仪器)
制造商:
TI(德州仪器)
分类:
接口芯片
封装:
VQFN-24
描述:
11.3 - Gbps的双通道电缆和PC主板均衡器 11.3-Gbps Dual-Channel Cable and PC Board Equalizer
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
封装尺寸在P26P27P28
封装信息在P26P27P28
应用领域在P32
导航目录
TLK1102ERGER数据手册
Page:
of 32 Go
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BLOCK DIAGRAM
Output
Buffer
Output
Driver
50 W50 W
VCC
Power-On
Reset
BandgapVoltage
Referenceand
BiasCurrent
Generation
2-WireInterfaceand
ControlLogic
SDA
SCL
DISA
IN[B:A]+
IN[B:A]–
OUT[B:A]–
OUT[B:A]+
SDA
SCL
DISA
Equalizer
Stage
InputBuffer
with
Selectable
Bandwidth
Offset
Cancellation
DISB
DISB
LossofSignal
Detection
LOS[B:A]
VCC
GND
MODE
MODE
CS
CS
RST
RST
50 W50 W
VCC
ADD0
ADD1
ADD0
ADD1
ADD2
ADD2
GeneralSettings
De-emphasis
OutputSwing
InputBandwidth
LOS AssertLevel
4-Bit
2 4-Bit´
2 7-Bit´
2 4-Bit´
2 7-Bit´
2 4-Bit´
2 1-Bit´
EqualizationLevel
LOSStatus
FastLOSControl
2 4-Bit´
2 1-Bit´
ControlSettings
TLK1102E
www.ti.com
................................................................................................................................................................................................... SLLS958 – MARCH 2009
A simplified block diagram of the TLK1102E is shown in Figure 1 for the two-wire serial interface control mode.
This compact, low power, 11.3-Gbps dual-channel equalizer consists of a high-speed data path with an offset
cancellation block combined with an analog input threshold selection circuitry, a loss of signal detection block, a
two-wire interface with a control-logic block, a bandgap voltage reference, and a bias current generation block.
Figure 1. Simplified Block Diagram of the TLK1102E
Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): TLK1102E
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